ISSCC 2007 / SESSION 17 / ANALOG TECHNIQUES AND PLLs / 17 . 2 17 . 2 A 0 . 65 V 2 . 5 GHz Fractional - N Frequency

For extremely-scaled CMOS technologies, supply voltages well below 1V will be required to maintain reliability [1]. Analog and RF design with standard devices then becomes very challenging because of the significant reduction in both the available signal swing and the available overdrive for biasing. We present ultralow-voltage design techniques that maintain all node voltages between the supply rails, and demonstrate them in the fractional-N RF synthesizer shown in Fig. 17.2.1, which was realized in 90nm CMOS. The VCO, phase-frequency detector (PFD) and charge pump (CP) nominally operate from a 0.5V supply while the divider uses a 0.65V supply.